DRV fault code on FOC detection

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dpetrillo
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Joined: 24 Dec 2015, 01:47

DRV fault code on FOC detection

Postby dpetrillo » 17 Mar 2016, 04:14

I plugged in a new motor to my board, FW2.16 and HW4.11. I had old motor settings in the firmware from a working motor setup I had been testing with (hoverboard wheel.) I connected a new 4 pole inrunner and tried to run detection in BLDC and got a bunch of bad results. I switched to FOC and I think it was when I started trying to measure lambda that the board started resetting and throwing the DRV error. This was on 12S. Everything else about the VESC still still works. Going back to the old motor and old settings, I cannot get the motor to spin and get DRV errors any time any current input is given to the motor. I have a second VESC but I don't want to plug it in and fry that one too! Where did I go wrong?

Dave

dpetrillo
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Joined: 24 Dec 2015, 01:47

Re: DRV fault code on FOC detection

Postby dpetrillo » 18 Mar 2016, 18:38

I had a friend who is an EE help me out with diagnosing the board a little bit. I'm going to relay some of his questions about the schematic related to why the DRV might have died:

1) Caps c8 c1 and c37 on page 7, A6 are rated to 50v on an up to 60V supply. Why aren't higher rated caps used? My lipos were at 45.5v at the time when it died just to note.

2) No TVS diode on Vsupply, voltages spike during the dead time between switching FETs and exceeds motor driver rating or spikes and blows the H1_VS, H2_VS, H3_VS inputs which is actually where the voltage could spike.

3) On the power mosfet page the 39k resistors shorting gate/source of each low side FET doesn't seem necessary with this gate driver if he's trying to get the low side to turn off quicker. If that is the objective, why not the high side as well? Why connect R36 as shown? It shorts the gate of Q4 not to its own source, but to the source of Q2 which is a different net.

It seems like a lot of people are blowing up their DRV chips. These are either very fragile, there is a bug, or the software is so customizable that it's very easy to set parameters so wrong that the chips blow up. It would be nice to configure the software to operate in a safe mode when trying out in new configurations and include more warnings, improve the design to be much more robust or a little of both. This is in no way intended to be criticism of the design or designer, but an effort to continue improvement.

zhivko
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Joined: 02 Jan 2018, 22:43
Location: slovenia

Re: DRV fault code on FOC detection

Postby zhivko » 02 Jan 2018, 22:50

I would be really great to get those answers - I agree with dpetrillo:

-R36 is not logically connected. If it is why its not same for phase_3?
vesc_question.png
vesc_question.png (95.8 KiB) Viewed 1514 times


- Also question for caps and 60V is in place - can we get answer for this? Is it meant that we beef up caps if we use more than 60V ?

regards

ThierryGTLTS
Posts: 86
Joined: 09 Aug 2017, 11:10

Re: DRV fault code on FOC detection

Postby ThierryGTLTS » 03 Jan 2018, 10:33

Good Morning,

1. You are right and I don't know why, but I think (hope) that manufacturers use at least 63V caps, although MLCC caps are very robust.

2. Yes it could be better, but I think it's to keep the board as small as possible.

3. I've never understood why this resistor is connected like that.

Don't forget that active components are often less robust than passive ones, so that's the MOSFETs and the DRV that are critical.

Some engineers prefer to use large safety margins for active components, 50% is not rare.

Hope this helps.

Thierry

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TheFallen
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Re: DRV fault code on FOC detection

Postby TheFallen » 03 Jan 2018, 16:56

I believe the resistor is connected like that so that the current path goes via one of the sense resistors.

ThierryGTLTS
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Re: DRV fault code on FOC detection

Postby ThierryGTLTS » 04 Jan 2018, 08:42

Possible, but the current trough this resistor is so small compared to the source current of the MOSFETs :!:

Thierry

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TheFallen
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Re: DRV fault code on FOC detection

Postby TheFallen » 04 Jan 2018, 08:50

The low-side sense resistors raise the 'GND' to ~60mV which would offset the non-sensing FET gate. This may cause DRV upsets. I don't know for sure but it kinda works now.

ThierryGTLTS
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Joined: 09 Aug 2017, 11:10

Re: DRV fault code on FOC detection

Postby ThierryGTLTS » 05 Jan 2018, 08:12

OK, it's possible because HW4.12 has only 2 sense resistors.

Thierry

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TheFallen
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Re: DRV fault code on FOC detection

Postby TheFallen » 05 Jan 2018, 16:05

zhivko wrote:Also question for caps and 60V is in place - can we get answer for this? Is it meant that we beef up caps if we use more than 60V ?


The DRV8302 has an ABSOLUTE MAXIMUM rating of +65V so regardless of how high the caps are rated anything more than that and the DRV8302 will be damaged. Of course remembering that when reducing speed the back EMF will cause the voltage rails to rise. I believe the accepted max voltage for a VESC or similarly DRV8302-based ESC is 12S or 50.4V.

rew
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Re: DRV fault code on FOC detection

Postby rew » 06 Jan 2018, 18:13

That pulldown resistor is connected like that due to layout issues. Where it is connected now is connected to the "normal" place through one or two 0.001 ohm resistors. So the resistor still does its work, but at 0.002 ohms more resistance.

With the DRV, you can DISABLE the FET outputs. In that case the chip will NOT drive the gates. If this happens by accident, say during powerup, you do NOT want both the topside and the bottom side fets conducting. A pulldown on the lowside fets is all that is needed to keep things in one piece.

I think the blowups happen due to a 60V diode near the DRV....


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