ADC channel configuration.

Are there any features that you would like to add to the VESC?
rew
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Joined: 25 Mar 2016, 12:29
Location: Delft, Netherlands.

ADC channel configuration.

Postby rew » 27 Mar 2016, 09:37

Benjamin: on my hardware the current sense channels were assigned differently than on your hardware. So I changed things around and got "weird" (i.e. not working) results. Spent a week trying to figure out what was wrong.

In the end it turns out that the assignment of the channels happens in two places and I had only seen one. (and when I eventually saw the other one, I inverted the two channels... Oops.)

What needs to be done to prevent other tinkerers like me from falling in the same trap is to add the CUR_A_CHANNEL definition to hw_xxx.h and then use those in the hw_xxx.c file.

If you say you'll accept the patch, I'll try to prepare it, while if you say: nah!, I'll just be content that it now works for me.

benjamin
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Re: ADC channel configuration.

Postby benjamin » 27 Mar 2016, 10:55

Sounds like a good plan, so if you make a nice patch I will accept it. I'm planning to update the configuration anyway when moving to HW5 to support hardware with both 2 and 3 shunts, so this will be a step in the right direction.

rew
Posts: 904
Joined: 25 Mar 2016, 12:29
Location: Delft, Netherlands.

Re: ADC channel configuration.

Postby rew » 27 Mar 2016, 13:38

Anything I can do to help to get support 3-shunt operation started? My hardware already has 3-shunts, with the B-phase shunt value being ignored by the software...

I would find it interesting to plot the calculated third phase current next to the measured one.

Can I make another suggestion?
I have the impression that my messing up the current measurement channels was partly due to confusion in the schematics.

Conventional is to name the motor phases A, B and C.

My suggestion is to work towards naming as many signals related to the phases A-B-C. The DRV currently has two current amplifiers, with CS1 tied to phase A and CS2 tied to phase C. Because the phases are sometimes called 1-2-3 in your schematic, and 1-and-3 are mixed up near the current sense shunts things have become difficult to follow. If you call the phases ABC and try to stick with that, it becomes easy to make a table: timer1 ch1 = phase A FET // ADC ch 5 = current A = DRV CS1 // etc.

I would provide a patch for your kicad file, but I'm not a kicad user....

rew
Posts: 904
Joined: 25 Mar 2016, 12:29
Location: Delft, Netherlands.

Re: ADC channel configuration.

Postby rew » 27 Mar 2016, 16:27

OK. First patch... I'd like to hear from you if you find this the proper way to proceed.

As I don't have hardware to test everything, I have to be very careful not to break something. If it would break, it would be difficult to debug. So I've spent more than an hour preparing. Now I can compile my reference source for a specific hardware version, and I can compare the result to my modified source. I've verified my "check" by first compiling for different hw versions and then it sounds the alarm. Similarly, I've introduced the error that caused me my troubles: swap two "injected channels" and that too is flagged.

So: this change does not change a single byte in the resulting binary. Readability and maintainability change ONLY:

http://prive.bitwizard.nl/410_cleanup.patch

If this has your support, I'll do the other hw versions too.


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